1. Field of The Invention
The invention relates to the field of back-up power supplies, and in particular to a continuously powered memory (CPM) backup power system.
2. Background Information
Power supplies having back-up battery circuitry are known, such as uninterruptible power supplies (UPS""s). In these power supplies, batteries are switched to provide back-up output power when they are needed, such as upon detection of a electrical utility power outage. Such power supplies are typically used for powering critical equipment, such as computer systems where a power outage could result in an expensive loss of data and/or services.
Standard UPS back-up power support in use with computer systems typically provides enough power for a limited period of continued system operation until the main power is restored. This limited period of time allows for an orderly shut down procedure should main power not be restored, e.g., saving data to disk, sending notifications to other systems, etc. However, as the size, performance, and complexity of computers has increased, the time needed to perform an orderly shut down of the computer after a utility failure is detected, for example, has also increased. It follows that the power requirements have also increased leading to larger and more expensive back-up power supplies.
To protect purchasers of the computer systems from the possible adverse consequences of a power failure, an integrated backup capability was built into a number of computer systems. This integrated backup was designed to protect those users who either do not purchase a UPS system, or who purchase an external UPS but want in addition an integrated failsafe backup mechanism which Will prevent data loss in the event of a main power failure. Integrated back-up may also incorporate a mode referred to as Continuously Powered Memory or Mainstore (CPM) by which, and as the name implies, power is continuously supplied to memory during a power failure after the computer has otherwise shut down.
With CPM, it is assumed that there is not enough time provided by the available back-up power to complete a traditional shut-down operation, i.e., writing changed contents of main storage memory to disk storage. Therefore, the contents of memory are preserved by continuously powering the memory during the power failure.
A proprietary CPM backup procedure in use includes a fixed, i.e., generally not customer alterable, 2-minute high-power (e.g., 3500 W) back-up for xe2x80x9cride-throughxe2x80x9d and CPM shutdown preparation time, followed by 48 hours, for example, of low-power (e.g., 50 W) back-up for the memory only. The ride-through time is a period of time, e.g., 30 seconds, during which the computer system continues to operate at full load in anticipation that the utility power failure is temporary and can be ridden through until utility power is restored. CPM shutdown preparation operations are launched after the ride-through time has elapsed. After the preparation operations are completed, back-up power is disconnected except that power to the memory is maintained. The memory refresh rate is decreased to reduce the load. The continuous powering of the memory in this latter stage may be referred to as simply xe2x80x9cCPM back-upxe2x80x9d herein.
This CPM back-up mechanism therefore is required to provide a relatively high-power full load backup of up to several kilowatts of power, for example, for a short period of time (e.g., 2 minutes maximum) for ride-through and CPM shutdown preparation, and then a relatively low-power memory only back-up of a few dozen watts, for example, for a much longer time period (e.g., 48 hours, typically) while memory is continuously powered.
These two different modes of battery powered backup with CPM are currently in use in certain computer systems, e.g. the IBM AS/400 (IBM and AS/400 are registered trademarks of International Business Machines Corporation). By xe2x80x9ctwo modesxe2x80x9d is meant the first mode, a high-power backup mode which precedes the second mode, a low-power continuous powered memory (or Mainstore) mode. Examples of such systems are described in copending applications, i.e., Ser. No. 08/988,553, entitled xe2x80x9cINTEGRATED UNINTERRUPTIBLE POWER SUPPLY AND CONTINUOUSLY POWERED MEMORY BACKUP SYSTEMxe2x80x9d filed Dec. 11, 1997 and Ser. No. 08/831,345, entitled xe2x80x9cUNINTERRUPTIBLE POWER SUPPLY PROVIDING CONTINUOUS POWER MAINSTORE FUNCTION FOR A COMPUTER SYSTEMxe2x80x9d filed Apr. 1, 1997 (now U.S. Pat. No. 5,872,984), both co-pending applications being assigned to International Business Machines Corporation.
Although one battery array can satisfy both the high-power backup and CPM requirements of some computer systems, many systems, especially those with large main storage complements, have required additional battery arrays in order to satisfy the two distinct backup requirements. Therefore, an external array of batteries has been added to these larger systems to provide CPM backup, incurring considerable additional expense.
In these systems, for continuously powering the memory, the batteries need not be capable of high-rate discharging, but should have large amp-hour capacities. The amp-hour capacity of the battery array is the limiting factor for CPM duration.
Conversely, batteries used for a high-power operation, e.g., the ride-through and CPM shutdown preparation operations, must be capable of high-rate discharges for short periods of time, but need not have large amp-hour capacities. However, batteries that are capable of such high-rate discharges invariably do have relatively large amp-hour capacities. Therefore, after the relatively short, high-power discharge, e.g., 2-minutes, these high-rate discharge batteries typically retain much of their energy, and this energy is available for the relatively long, lower-rate discharge of maintaining the memory contents.
High-voltage serial battery strings are sometimes used for the high-rate discharge backup, e.g., 360 VDC. The 360 VDC provided corresponds approximately to the voltage output from a power supply full-wave rectifier circuit provided with a nominal 220 VAC line voltage input. Therefore, this voltage level simplifies the backup circuitry eliminating the need for a battery booster circuit, for example. Further, a given power can be provided with lower current levels with a higher-voltage source (since power P equals voltage V times current I), reducing so-called I2R losses due to wire resistances R, for example. However, power supplies that use relatively low battery terminal voltage with a booster stage/PFC (power factor correction) circuit are also known and used.
Because memory devices are low voltage devices, typically 3 VDC, or less, for example, the continuously powered memory only requires a relatively low voltage to maintain the memory devices. However, converting the relatively high battery string voltage to the relatively low memory voltage wastes battery energy in the conversion process due to switching and gate drive losses in the DC-to-DC switched mode power supply switching FET""s, which losses are proportional to the Vin supplied.
This conversion inefficiency has contributed to the need for larger batteries through a separate (external) battery pack dedicated to CPM, as noted above, for providing low-power low-voltage memory maintenance for the desired 48 hours, adding to the costs of such systems.
Therefore, a need exists for a way to avoid the inefficiency described above, while providing the high and low back-up power modes required, without the need for separate battery packs. With better efficiency, a longer CPM time could be realized and/or the size of the battery back-up required could be reduced.
It is, therefore, a principal object of this invention to provide a method and apparatus for providing battery back-up.
It is another object of the invention to provide a method and apparatus that solves the above mentioned problems so that that battery back-up is accomplished more efficiently and less expensively.
These and other objects of the present invention are accomplished by the method and apparatus disclosed herein.
According to an aspect of the invention, switches are provided for converting a battery back-up system output from a relatively higher-voltage, high-power, series battery string output to a relatively lower-voltage, low power, parallel battery output.
According to an aspect of the invention, the switches are low resistance devices, such as metal oxide field effect transistors (MOSFET""s).
According to another aspect of the invention, a battery backup system backs-up a first and a second load. A plurality of batteries are interconnected to the loads by a plurality of switches, such that the plurality of batteries are selectively connected to the first load in series with each other, or to the second load in parallel with each other. The switches may advantageously be low ON resistance field effect transistors, for example.
According to another aspect of the-invention, a small transition battery is provided which is switched in to power the second load during a short transition phase in which the batteries are being changed from a series to a parallel connection.
According to another aspect of the invention, the battery back-up system switches are controlled by a switch controller. The switch controller provides a high-power back-up phase during which the plurality of batteries are connected in series to the first load, the transition phase, during which the transition battery is connected to the second load, and a low-power phase during which the plurality of batteries are connected in parallel to the second load.
According to another aspect of the invention, the switch controller is activated and/or controlled by a system power control network.
According to another aspect of the invention, the battery back-up system is disposed to provide back-up to a computer having a power control network, wherein the switch controller is controlled by the power control network to initiate and control battery back-up operation.
According to another aspect of the invention, the switches are divided into groups. Group A switches are disposed to connect respective ones of the plurality of batteries in a series arrangement. Group B switches are disposed to connect respective ones of the plurality of batteries in a parallel arrangement. An X switch is disposed to connect the plurality of batteries to the first load. A Y switch is disposed to connect the plurality of batteries to the second load. A Z switch the transition battery to the second load.
According to another aspect of the invention, the first load is a relatively high-power load, and the second load is a relatively low-power load.
According to another aspect of the invention, the relatively high-power load is a computer power supply, and the relatively low-power load is a continuously powered memory regulator.
According to another aspect of the invention, the computer power supply provides power to operate a computer system including memory, and the continuously powered memory regulator provides power to maintain the contents of the computer system memory during a computer system shut-down.
According to another aspect of the invention, a method of providing a high-power and a low-power battery back-up with a battery back-up unit having a plurality of batteries includes connecting the plurality of batteries in series with an output of the battery back-up unit to provide the high-power battery back-up and connecting the plurality of batteries in parallel with the output of the battery back-up unit to provide the low-power battery back-up.
According to another aspect of the invention, a method of providing a high-power battery back-up, a transition back-up phase, and a low-power battery back-up with a battery back-up-unit having a plurality of batteries and a plurality of switches, includes closing a first group of switches to configure the plurality of batteries in a series array, closing a first load switch to connect the series array of batteries to a first load to begin the high-power battery back-up, closing a transition battery switch to connect a transition battery to a second load, opening the first load switch to disconnect the series array of batteries from the first load to begin the transition back-up phase and end the high-power battery back-up, opening the first group of switches to deconfigure the plurality of batteries from the series array, closing a second group of switches to configure the plurality of batteries in a parallel array, closing a second load switch to connect the parallel array of batteries to the second load, and opening the transition battery switch to disconnect the transition battery from the second load to end the transition back-up phase and begin the low-power battery back-up. During the transition phase, where a memory device is supplied with power during the low-power battery back-up, the refresh rate of the memory device is advantageously reduced.
According to another aspect of the invention, the high-power battery back-up is provided for a relatively short time period on the order of minutes, and the low-power battery back-up can be provided for a relatively longer time period on the order of hours or days.
According to another aspect of the invention, thirty twelve-volt batteries are used to provide a nominal 360-volt terminal voltage at the output when the switches place the batteries in series for the higher-voltage output, and provide a nominal twelve-volt terminal voltage at the output when the switches place the batteries in parallel for the relatively lower-voltage output.
These and other aspects of the invention will become apparent from the detailed description set forth below.